![Table 6 from Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits | Semantic Scholar Table 6 from Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits | Semantic Scholar](https://d3i71xaburhd42.cloudfront.net/1597f3a1a4b8481427dc3d6d6381f0c1307398d9/4-Table6-1.png)
Table 6 from Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits | Semantic Scholar
![SOLVED: A.) Construct a demultiplexer using NAND gates only, provided the truth table below. Examine results. B.) Given the Truth Table above, construct a demultiplexer using basic gates only, then compare results SOLVED: A.) Construct a demultiplexer using NAND gates only, provided the truth table below. Examine results. B.) Given the Truth Table above, construct a demultiplexer using basic gates only, then compare results](https://cdn.numerade.com/ask_images/620637b2df93401686c4cbe6f8fb0bec.jpg)
SOLVED: A.) Construct a demultiplexer using NAND gates only, provided the truth table below. Examine results. B.) Given the Truth Table above, construct a demultiplexer using basic gates only, then compare results
![digital logic - Dmultiplexer truth table and boolean expression - Electrical Engineering Stack Exchange digital logic - Dmultiplexer truth table and boolean expression - Electrical Engineering Stack Exchange](https://i.stack.imgur.com/cwqjl.png)
digital logic - Dmultiplexer truth table and boolean expression - Electrical Engineering Stack Exchange
![Table 4 from Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits | Semantic Scholar Table 4 from Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits | Semantic Scholar](https://d3i71xaburhd42.cloudfront.net/1597f3a1a4b8481427dc3d6d6381f0c1307398d9/3-Table4-1.png)